mirror of
https://github.com/MikronMIK32/mik32-uploader.git
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rework pm config
This commit is contained in:
Sergey Shchelkanov
parent
1837ee7191
commit
a09c3a0af4
183
mik32_pm.py
183
mik32_pm.py
@ -1,6 +1,9 @@
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# --------------------------
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# PM register offset
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# --------------------------
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from tclrpc import OpenOcdTclRpc
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PM_BASE_ADDRESS = 0x000050000
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PM_Clk_AHB_Set_OFFSET = 0x0C
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@ -12,78 +15,78 @@ PM_Clk_APB_P_Set_OFFSET = 0x1C
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# --------------------------
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# AHB BUS
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PM_CLOCK_CPU_S = 0
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PM_CLOCK_CPU_M = (1 << PM_CLOCK_CPU_S)
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PM_CLOCK_EEPROM_S = 1
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PM_CLOCK_EEPROM_M = (1 << PM_CLOCK_EEPROM_S)
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PM_CLOCK_RAM_S = 2
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PM_CLOCK_RAM_M = (1 << PM_CLOCK_RAM_S)
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PM_CLOCK_SPIFI_S = 3
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PM_CLOCK_SPIFI_M = (1 << PM_CLOCK_SPIFI_S)
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PM_CLOCK_TCB_S = 4
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PM_CLOCK_TCB_M = (1 << PM_CLOCK_TCB_S)
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PM_CLOCK_DMA_S = 5
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PM_CLOCK_DMA_M = (1 << PM_CLOCK_DMA_S)
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PM_CLOCK_CRYPTO_S = 6
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PM_CLOCK_CRYPTO_M = (1 << PM_CLOCK_CRYPTO_S)
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PM_CLOCK_CRC32_S = 7
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PM_CLOCK_CRC32_M = (1 << PM_CLOCK_CRC32_S)
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PM_CLOCK_AHB_CPU_S = 0
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PM_CLOCK_AHB_CPU_M = (1 << PM_CLOCK_AHB_CPU_S)
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PM_CLOCK_AHB_EEPROM_S = 1
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PM_CLOCK_AHB_EEPROM_M = (1 << PM_CLOCK_AHB_EEPROM_S)
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PM_CLOCK_AHB_RAM_S = 2
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PM_CLOCK_AHB_RAM_M = (1 << PM_CLOCK_AHB_RAM_S)
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PM_CLOCK_AHB_SPIFI_S = 3
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PM_CLOCK_AHB_SPIFI_M = (1 << PM_CLOCK_AHB_SPIFI_S)
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PM_CLOCK_AHB_TCB_S = 4
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PM_CLOCK_AHB_TCB_M = (1 << PM_CLOCK_AHB_TCB_S)
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PM_CLOCK_AHB_DMA_S = 5
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PM_CLOCK_AHB_DMA_M = (1 << PM_CLOCK_AHB_DMA_S)
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PM_CLOCK_AHB_CRYPTO_S = 6
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PM_CLOCK_AHB_CRYPTO_M = (1 << PM_CLOCK_AHB_CRYPTO_S)
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PM_CLOCK_AHB_CRC32_S = 7
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PM_CLOCK_AHB_CRC32_M = (1 << PM_CLOCK_AHB_CRC32_S)
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# APB M
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PM_CLOCK_PM_S = 0
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PM_CLOCK_PM_M = (1 << PM_CLOCK_PM_S)
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PM_CLOCK_EPIC_S = 1
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PM_CLOCK_EPIC_M = (1 << PM_CLOCK_EPIC_S)
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PM_CLOCK_TIMER32_0_S = 2
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PM_CLOCK_TIMER32_0_M = (1 << PM_CLOCK_TIMER32_0_S)
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PM_CLOCK_GPIO_S = 3
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PM_CLOCK_GPIO_M = (1 << PM_CLOCK_GPIO_S)
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PM_CLOCK_WDT_BUS_S = 4
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PM_CLOCK_WDT_BUS_M = (1 << PM_CLOCK_WDT_BUS_S)
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PM_CLOCK_OTP_S = 5
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PM_CLOCK_OTP_M = (1 << PM_CLOCK_OTP_S)
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PM_CLOCK_PMON_S = 6
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PM_CLOCK_PMON_M = (1 << PM_CLOCK_PMON_S)
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PM_CLOCK_WU_S = 7
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PM_CLOCK_WU_M = (1 << PM_CLOCK_WU_S)
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PM_CLOCK_RTC_S = 8
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PM_CLOCK_RTC_M = (1 << PM_CLOCK_RTC_S)
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PM_CLOCK_APB_M_PM_S = 0
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PM_CLOCK_APB_M_PM_M = (1 << PM_CLOCK_APB_M_PM_S)
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PM_CLOCK_APB_M_EPIC_S = 1
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PM_CLOCK_APB_M_EPIC_M = (1 << PM_CLOCK_APB_M_EPIC_S)
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PM_CLOCK_APB_M_TIMER32_0_S = 2
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PM_CLOCK_APB_M_TIMER32_0_M = (1 << PM_CLOCK_APB_M_TIMER32_0_S)
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PM_CLOCK_APB_M_PAD_CONFIG_S = 3
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PM_CLOCK_APB_M_PAD_CONFIG_M = (1 << PM_CLOCK_APB_M_PAD_CONFIG_S)
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PM_CLOCK_APB_M_WDT_BUS_S = 4
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PM_CLOCK_APB_M_WDT_BUS_M = (1 << PM_CLOCK_APB_M_WDT_BUS_S)
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PM_CLOCK_APB_M_OTP_S = 5
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PM_CLOCK_APB_M_OTP_M = (1 << PM_CLOCK_APB_M_OTP_S)
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PM_CLOCK_APB_M_PMON_S = 6
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PM_CLOCK_APB_M_PMON_M = (1 << PM_CLOCK_APB_M_PMON_S)
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PM_CLOCK_APB_M_WU_S = 7
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PM_CLOCK_APB_M_WU_M = (1 << PM_CLOCK_APB_M_WU_S)
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PM_CLOCK_APB_M_RTC_S = 8
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PM_CLOCK_APB_M_RTC_M = (1 << PM_CLOCK_APB_M_RTC_S)
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# APB_P
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PM_CLOCK_WDT_S = 0
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PM_CLOCK_WDT_M = (1 << PM_CLOCK_WDT_S)
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PM_CLOCK_UART_0_S = 1
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PM_CLOCK_UART_0_M = (1 << PM_CLOCK_UART_0_S)
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PM_CLOCK_UART_1_S = 2
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PM_CLOCK_UART_1_M = (1 << PM_CLOCK_UART_1_S)
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PM_CLOCK_TIMER16_0_S = 3
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PM_CLOCK_TIMER16_0_M = (1 << PM_CLOCK_TIMER16_0_S)
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PM_CLOCK_TIMER16_1_S = 4
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PM_CLOCK_TIMER16_1_M = (1 << PM_CLOCK_TIMER16_1_S)
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PM_CLOCK_TIMER16_2_S = 5
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PM_CLOCK_TIMER16_2_M = (1 << PM_CLOCK_TIMER16_2_S)
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PM_CLOCK_TIMER32_1_S = 6
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PM_CLOCK_TIMER32_1_M = (1 << PM_CLOCK_TIMER32_1_S)
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PM_CLOCK_TIMER32_2_S = 7
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PM_CLOCK_TIMER32_2_M = (1 << PM_CLOCK_TIMER32_2_S)
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PM_CLOCK_SPI_0_S = 8
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PM_CLOCK_SPI_0_M = (1 << PM_CLOCK_SPI_0_S)
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PM_CLOCK_SPI_1_S = 9
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PM_CLOCK_SPI_1_M = (1 << PM_CLOCK_SPI_1_S)
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PM_CLOCK_I2C_0_S = 10
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PM_CLOCK_I2C_0_M = (1 << PM_CLOCK_I2C_0_S)
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PM_CLOCK_I2C_1_S = 11
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PM_CLOCK_I2C_1_M = (1 << PM_CLOCK_I2C_1_S)
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PM_CLOCK_GPIO_0_S = 12
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PM_CLOCK_GPIO_0_M = (1 << PM_CLOCK_GPIO_0_S)
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PM_CLOCK_GPIO_1_S = 13
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PM_CLOCK_GPIO_1_M = (1 << PM_CLOCK_GPIO_1_S)
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PM_CLOCK_GPIO_2_S = 14
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PM_CLOCK_GPIO_2_M = (1 << PM_CLOCK_GPIO_2_S)
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PM_CLOCK_ANALOG_S = 15
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PM_CLOCK_ANALOG_M = (1 << PM_CLOCK_ANALOG_S)
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PM_CLOCK_GPIO_IRQ_S = 16
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PM_CLOCK_GPIO_IRQ_M = (1 << PM_CLOCK_GPIO_IRQ_S)
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PM_CLOCK_APB_P_WDT_S = 0
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PM_CLOCK_APB_P_WDT_M = (1 << PM_CLOCK_APB_P_WDT_S)
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PM_CLOCK_APB_P_UART_0_S = 1
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PM_CLOCK_APB_P_UART_0_M = (1 << PM_CLOCK_APB_P_UART_0_S)
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PM_CLOCK_APB_P_UART_1_S = 2
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PM_CLOCK_APB_P_UART_1_M = (1 << PM_CLOCK_APB_P_UART_1_S)
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PM_CLOCK_APB_P_TIMER16_0_S = 3
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PM_CLOCK_APB_P_TIMER16_0_M = (1 << PM_CLOCK_APB_P_TIMER16_0_S)
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PM_CLOCK_APB_P_TIMER16_1_S = 4
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PM_CLOCK_APB_P_TIMER16_1_M = (1 << PM_CLOCK_APB_P_TIMER16_1_S)
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PM_CLOCK_APB_P_TIMER16_2_S = 5
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PM_CLOCK_APB_P_TIMER16_2_M = (1 << PM_CLOCK_APB_P_TIMER16_2_S)
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PM_CLOCK_APB_P_TIMER32_1_S = 6
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PM_CLOCK_APB_P_TIMER32_1_M = (1 << PM_CLOCK_APB_P_TIMER32_1_S)
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PM_CLOCK_APB_P_TIMER32_2_S = 7
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PM_CLOCK_APB_P_TIMER32_2_M = (1 << PM_CLOCK_APB_P_TIMER32_2_S)
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PM_CLOCK_APB_P_SPI_0_S = 8
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PM_CLOCK_APB_P_SPI_0_M = (1 << PM_CLOCK_APB_P_SPI_0_S)
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PM_CLOCK_APB_P_SPI_1_S = 9
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PM_CLOCK_APB_P_SPI_1_M = (1 << PM_CLOCK_APB_P_SPI_1_S)
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PM_CLOCK_APB_P_I2C_0_S = 10
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PM_CLOCK_APB_P_I2C_0_M = (1 << PM_CLOCK_APB_P_I2C_0_S)
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PM_CLOCK_APB_P_I2C_1_S = 11
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PM_CLOCK_APB_P_I2C_1_M = (1 << PM_CLOCK_APB_P_I2C_1_S)
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PM_CLOCK_APB_P_GPIO_0_S = 12
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PM_CLOCK_APB_P_GPIO_0_M = (1 << PM_CLOCK_APB_P_GPIO_0_S)
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PM_CLOCK_APB_P_GPIO_1_S = 13
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PM_CLOCK_APB_P_GPIO_1_M = (1 << PM_CLOCK_APB_P_GPIO_1_S)
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PM_CLOCK_APB_P_GPIO_2_S = 14
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PM_CLOCK_APB_P_GPIO_2_M = (1 << PM_CLOCK_APB_P_GPIO_2_S)
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PM_CLOCK_APB_P_ANALOG_S = 15
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PM_CLOCK_APB_P_ANALOG_M = (1 << PM_CLOCK_APB_P_ANALOG_S)
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PM_CLOCK_APB_P_GPIO_IRQ_S = 16
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PM_CLOCK_APB_P_GPIO_IRQ_M = (1 << PM_CLOCK_APB_P_GPIO_IRQ_S)
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# --------------------------
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# WU register offset
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@ -97,11 +100,45 @@ WU_CLOCKS_BU_OFFSET = 0x10
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# --------------------------
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# CLOCKS_BU
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CLOCKS_BU_OCS32K_EN_S = 0
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CLOCKS_BU_OCS32K_EN_M = (1 << CLOCKS_BU_OCS32K_EN_S)
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CLOCKS_BU_RC32K_EN_S = 1
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CLOCKS_BU_RC32K_EN_M = (1 << CLOCKS_BU_RC32K_EN_S)
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CLOCKS_BU_ADJ_RC32K_S = 2
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CLOCKS_BU_ADJ_RC32K_M = (0b11111111 << CLOCKS_BU_ADJ_RC32K_S)
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CLOCKS_BU_RTC_CLK_MUX_S = 10
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CLOCKS_BU_RTC_CLK_MUX_M = (1 << CLOCKS_BU_RTC_CLK_MUX_S)
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CLOCKS_BU_OSC32K_SM_S = 14
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CLOCKS_BU_OSC32K_SM_M = (1 << CLOCKS_BU_OSC32K_SM_S)
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def pm_init(openocd: OpenOcdTclRpc):
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def pm_init():
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openocd.write_word(WU_BASE_ADDRESS + WU_CLOCKS_BU_OFFSET, 0x202)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_P_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_M_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, 0xffffffff)
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WU_CLOCKS_default = 128 << CLOCKS_BU_ADJ_RC32K_S
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AHB_default = (
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PM_CLOCK_AHB_CPU_M |
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PM_CLOCK_AHB_EEPROM_M |
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PM_CLOCK_AHB_RAM_M |
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PM_CLOCK_AHB_SPIFI_M |
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PM_CLOCK_AHB_TCB_M |
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PM_CLOCK_AHB_DMA_M
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)
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# 0x1F
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APB_M_default = (
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PM_CLOCK_APB_M_PM_M |
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PM_CLOCK_APB_M_PAD_CONFIG_M |
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PM_CLOCK_APB_M_WU_M
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)
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# 0x89
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APB_P_default = 0
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# 0x00
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openocd.halt()
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openocd.write_word(WU_BASE_ADDRESS +
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WU_CLOCKS_BU_OFFSET, WU_CLOCKS_default)
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openocd.write_word(PM_BASE_ADDRESS +
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PM_Clk_APB_P_Set_OFFSET, APB_P_default)
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openocd.write_word(PM_BASE_ADDRESS +
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PM_Clk_APB_M_Set_OFFSET, APB_M_default)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, AHB_default)
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@ -320,7 +320,7 @@ def upload_file(
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openocd.run(f"log_output \"{log_path}\"")
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openocd.run(f"debug_level 1")
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mik32_pm.pm_init()
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mik32_pm.pm_init(openocd)
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if (pages.pages_eeprom.__len__() > 0):
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start_time = time.perf_counter()
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