From a09c3a0af4da8090d741d0712e8dcb8c67b371ce Mon Sep 17 00:00:00 2001 From: Sergey Shchelkanov Date: Mon, 28 Aug 2023 18:00:32 +0300 Subject: [PATCH] rework pm config --- mik32_pm.py | 183 +++++++++++++++++++++++++++++------------------- mik32_upload.py | 2 +- 2 files changed, 111 insertions(+), 74 deletions(-) diff --git a/mik32_pm.py b/mik32_pm.py index 8d2c9be..5c723e3 100644 --- a/mik32_pm.py +++ b/mik32_pm.py @@ -1,6 +1,9 @@ # -------------------------- # PM register offset # -------------------------- +from tclrpc import OpenOcdTclRpc + + PM_BASE_ADDRESS = 0x000050000 PM_Clk_AHB_Set_OFFSET = 0x0C @@ -12,78 +15,78 @@ PM_Clk_APB_P_Set_OFFSET = 0x1C # -------------------------- # AHB BUS -PM_CLOCK_CPU_S = 0 -PM_CLOCK_CPU_M = (1 << PM_CLOCK_CPU_S) -PM_CLOCK_EEPROM_S = 1 -PM_CLOCK_EEPROM_M = (1 << PM_CLOCK_EEPROM_S) -PM_CLOCK_RAM_S = 2 -PM_CLOCK_RAM_M = (1 << PM_CLOCK_RAM_S) -PM_CLOCK_SPIFI_S = 3 -PM_CLOCK_SPIFI_M = (1 << PM_CLOCK_SPIFI_S) -PM_CLOCK_TCB_S = 4 -PM_CLOCK_TCB_M = (1 << PM_CLOCK_TCB_S) -PM_CLOCK_DMA_S = 5 -PM_CLOCK_DMA_M = (1 << PM_CLOCK_DMA_S) -PM_CLOCK_CRYPTO_S = 6 -PM_CLOCK_CRYPTO_M = (1 << PM_CLOCK_CRYPTO_S) -PM_CLOCK_CRC32_S = 7 -PM_CLOCK_CRC32_M = (1 << PM_CLOCK_CRC32_S) +PM_CLOCK_AHB_CPU_S = 0 +PM_CLOCK_AHB_CPU_M = (1 << PM_CLOCK_AHB_CPU_S) +PM_CLOCK_AHB_EEPROM_S = 1 +PM_CLOCK_AHB_EEPROM_M = (1 << PM_CLOCK_AHB_EEPROM_S) +PM_CLOCK_AHB_RAM_S = 2 +PM_CLOCK_AHB_RAM_M = (1 << PM_CLOCK_AHB_RAM_S) +PM_CLOCK_AHB_SPIFI_S = 3 +PM_CLOCK_AHB_SPIFI_M = (1 << PM_CLOCK_AHB_SPIFI_S) +PM_CLOCK_AHB_TCB_S = 4 +PM_CLOCK_AHB_TCB_M = (1 << PM_CLOCK_AHB_TCB_S) +PM_CLOCK_AHB_DMA_S = 5 +PM_CLOCK_AHB_DMA_M = (1 << PM_CLOCK_AHB_DMA_S) +PM_CLOCK_AHB_CRYPTO_S = 6 +PM_CLOCK_AHB_CRYPTO_M = (1 << PM_CLOCK_AHB_CRYPTO_S) +PM_CLOCK_AHB_CRC32_S = 7 +PM_CLOCK_AHB_CRC32_M = (1 << PM_CLOCK_AHB_CRC32_S) # APB M -PM_CLOCK_PM_S = 0 -PM_CLOCK_PM_M = (1 << PM_CLOCK_PM_S) -PM_CLOCK_EPIC_S = 1 -PM_CLOCK_EPIC_M = (1 << PM_CLOCK_EPIC_S) -PM_CLOCK_TIMER32_0_S = 2 -PM_CLOCK_TIMER32_0_M = (1 << PM_CLOCK_TIMER32_0_S) -PM_CLOCK_GPIO_S = 3 -PM_CLOCK_GPIO_M = (1 << PM_CLOCK_GPIO_S) -PM_CLOCK_WDT_BUS_S = 4 -PM_CLOCK_WDT_BUS_M = (1 << PM_CLOCK_WDT_BUS_S) -PM_CLOCK_OTP_S = 5 -PM_CLOCK_OTP_M = (1 << PM_CLOCK_OTP_S) -PM_CLOCK_PMON_S = 6 -PM_CLOCK_PMON_M = (1 << PM_CLOCK_PMON_S) -PM_CLOCK_WU_S = 7 -PM_CLOCK_WU_M = (1 << PM_CLOCK_WU_S) -PM_CLOCK_RTC_S = 8 -PM_CLOCK_RTC_M = (1 << PM_CLOCK_RTC_S) +PM_CLOCK_APB_M_PM_S = 0 +PM_CLOCK_APB_M_PM_M = (1 << PM_CLOCK_APB_M_PM_S) +PM_CLOCK_APB_M_EPIC_S = 1 +PM_CLOCK_APB_M_EPIC_M = (1 << PM_CLOCK_APB_M_EPIC_S) +PM_CLOCK_APB_M_TIMER32_0_S = 2 +PM_CLOCK_APB_M_TIMER32_0_M = (1 << PM_CLOCK_APB_M_TIMER32_0_S) +PM_CLOCK_APB_M_PAD_CONFIG_S = 3 +PM_CLOCK_APB_M_PAD_CONFIG_M = (1 << PM_CLOCK_APB_M_PAD_CONFIG_S) +PM_CLOCK_APB_M_WDT_BUS_S = 4 +PM_CLOCK_APB_M_WDT_BUS_M = (1 << PM_CLOCK_APB_M_WDT_BUS_S) +PM_CLOCK_APB_M_OTP_S = 5 +PM_CLOCK_APB_M_OTP_M = (1 << PM_CLOCK_APB_M_OTP_S) +PM_CLOCK_APB_M_PMON_S = 6 +PM_CLOCK_APB_M_PMON_M = (1 << PM_CLOCK_APB_M_PMON_S) +PM_CLOCK_APB_M_WU_S = 7 +PM_CLOCK_APB_M_WU_M = (1 << PM_CLOCK_APB_M_WU_S) +PM_CLOCK_APB_M_RTC_S = 8 +PM_CLOCK_APB_M_RTC_M = (1 << PM_CLOCK_APB_M_RTC_S) # APB_P -PM_CLOCK_WDT_S = 0 -PM_CLOCK_WDT_M = (1 << PM_CLOCK_WDT_S) -PM_CLOCK_UART_0_S = 1 -PM_CLOCK_UART_0_M = (1 << PM_CLOCK_UART_0_S) -PM_CLOCK_UART_1_S = 2 -PM_CLOCK_UART_1_M = (1 << PM_CLOCK_UART_1_S) -PM_CLOCK_TIMER16_0_S = 3 -PM_CLOCK_TIMER16_0_M = (1 << PM_CLOCK_TIMER16_0_S) -PM_CLOCK_TIMER16_1_S = 4 -PM_CLOCK_TIMER16_1_M = (1 << PM_CLOCK_TIMER16_1_S) -PM_CLOCK_TIMER16_2_S = 5 -PM_CLOCK_TIMER16_2_M = (1 << PM_CLOCK_TIMER16_2_S) -PM_CLOCK_TIMER32_1_S = 6 -PM_CLOCK_TIMER32_1_M = (1 << PM_CLOCK_TIMER32_1_S) -PM_CLOCK_TIMER32_2_S = 7 -PM_CLOCK_TIMER32_2_M = (1 << PM_CLOCK_TIMER32_2_S) -PM_CLOCK_SPI_0_S = 8 -PM_CLOCK_SPI_0_M = (1 << PM_CLOCK_SPI_0_S) -PM_CLOCK_SPI_1_S = 9 -PM_CLOCK_SPI_1_M = (1 << PM_CLOCK_SPI_1_S) -PM_CLOCK_I2C_0_S = 10 -PM_CLOCK_I2C_0_M = (1 << PM_CLOCK_I2C_0_S) -PM_CLOCK_I2C_1_S = 11 -PM_CLOCK_I2C_1_M = (1 << PM_CLOCK_I2C_1_S) -PM_CLOCK_GPIO_0_S = 12 -PM_CLOCK_GPIO_0_M = (1 << PM_CLOCK_GPIO_0_S) -PM_CLOCK_GPIO_1_S = 13 -PM_CLOCK_GPIO_1_M = (1 << PM_CLOCK_GPIO_1_S) -PM_CLOCK_GPIO_2_S = 14 -PM_CLOCK_GPIO_2_M = (1 << PM_CLOCK_GPIO_2_S) -PM_CLOCK_ANALOG_S = 15 -PM_CLOCK_ANALOG_M = (1 << PM_CLOCK_ANALOG_S) -PM_CLOCK_GPIO_IRQ_S = 16 -PM_CLOCK_GPIO_IRQ_M = (1 << PM_CLOCK_GPIO_IRQ_S) +PM_CLOCK_APB_P_WDT_S = 0 +PM_CLOCK_APB_P_WDT_M = (1 << PM_CLOCK_APB_P_WDT_S) +PM_CLOCK_APB_P_UART_0_S = 1 +PM_CLOCK_APB_P_UART_0_M = (1 << PM_CLOCK_APB_P_UART_0_S) +PM_CLOCK_APB_P_UART_1_S = 2 +PM_CLOCK_APB_P_UART_1_M = (1 << PM_CLOCK_APB_P_UART_1_S) +PM_CLOCK_APB_P_TIMER16_0_S = 3 +PM_CLOCK_APB_P_TIMER16_0_M = (1 << PM_CLOCK_APB_P_TIMER16_0_S) +PM_CLOCK_APB_P_TIMER16_1_S = 4 +PM_CLOCK_APB_P_TIMER16_1_M = (1 << PM_CLOCK_APB_P_TIMER16_1_S) +PM_CLOCK_APB_P_TIMER16_2_S = 5 +PM_CLOCK_APB_P_TIMER16_2_M = (1 << PM_CLOCK_APB_P_TIMER16_2_S) +PM_CLOCK_APB_P_TIMER32_1_S = 6 +PM_CLOCK_APB_P_TIMER32_1_M = (1 << PM_CLOCK_APB_P_TIMER32_1_S) +PM_CLOCK_APB_P_TIMER32_2_S = 7 +PM_CLOCK_APB_P_TIMER32_2_M = (1 << PM_CLOCK_APB_P_TIMER32_2_S) +PM_CLOCK_APB_P_SPI_0_S = 8 +PM_CLOCK_APB_P_SPI_0_M = (1 << PM_CLOCK_APB_P_SPI_0_S) +PM_CLOCK_APB_P_SPI_1_S = 9 +PM_CLOCK_APB_P_SPI_1_M = (1 << PM_CLOCK_APB_P_SPI_1_S) +PM_CLOCK_APB_P_I2C_0_S = 10 +PM_CLOCK_APB_P_I2C_0_M = (1 << PM_CLOCK_APB_P_I2C_0_S) +PM_CLOCK_APB_P_I2C_1_S = 11 +PM_CLOCK_APB_P_I2C_1_M = (1 << PM_CLOCK_APB_P_I2C_1_S) +PM_CLOCK_APB_P_GPIO_0_S = 12 +PM_CLOCK_APB_P_GPIO_0_M = (1 << PM_CLOCK_APB_P_GPIO_0_S) +PM_CLOCK_APB_P_GPIO_1_S = 13 +PM_CLOCK_APB_P_GPIO_1_M = (1 << PM_CLOCK_APB_P_GPIO_1_S) +PM_CLOCK_APB_P_GPIO_2_S = 14 +PM_CLOCK_APB_P_GPIO_2_M = (1 << PM_CLOCK_APB_P_GPIO_2_S) +PM_CLOCK_APB_P_ANALOG_S = 15 +PM_CLOCK_APB_P_ANALOG_M = (1 << PM_CLOCK_APB_P_ANALOG_S) +PM_CLOCK_APB_P_GPIO_IRQ_S = 16 +PM_CLOCK_APB_P_GPIO_IRQ_M = (1 << PM_CLOCK_APB_P_GPIO_IRQ_S) # -------------------------- # WU register offset @@ -97,11 +100,45 @@ WU_CLOCKS_BU_OFFSET = 0x10 # -------------------------- # CLOCKS_BU +CLOCKS_BU_OCS32K_EN_S = 0 +CLOCKS_BU_OCS32K_EN_M = (1 << CLOCKS_BU_OCS32K_EN_S) +CLOCKS_BU_RC32K_EN_S = 1 +CLOCKS_BU_RC32K_EN_M = (1 << CLOCKS_BU_RC32K_EN_S) +CLOCKS_BU_ADJ_RC32K_S = 2 +CLOCKS_BU_ADJ_RC32K_M = (0b11111111 << CLOCKS_BU_ADJ_RC32K_S) +CLOCKS_BU_RTC_CLK_MUX_S = 10 +CLOCKS_BU_RTC_CLK_MUX_M = (1 << CLOCKS_BU_RTC_CLK_MUX_S) +CLOCKS_BU_OSC32K_SM_S = 14 +CLOCKS_BU_OSC32K_SM_M = (1 << CLOCKS_BU_OSC32K_SM_S) +def pm_init(openocd: OpenOcdTclRpc): -def pm_init(): - openocd.write_word(WU_BASE_ADDRESS + WU_CLOCKS_BU_OFFSET, 0x202) - openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_P_Set_OFFSET, 0xffffffff) - openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_M_Set_OFFSET, 0xffffffff) - openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, 0xffffffff) \ No newline at end of file + WU_CLOCKS_default = 128 << CLOCKS_BU_ADJ_RC32K_S + + AHB_default = ( + PM_CLOCK_AHB_CPU_M | + PM_CLOCK_AHB_EEPROM_M | + PM_CLOCK_AHB_RAM_M | + PM_CLOCK_AHB_SPIFI_M | + PM_CLOCK_AHB_TCB_M | + PM_CLOCK_AHB_DMA_M + ) + # 0x1F + APB_M_default = ( + PM_CLOCK_APB_M_PM_M | + PM_CLOCK_APB_M_PAD_CONFIG_M | + PM_CLOCK_APB_M_WU_M + ) + # 0x89 + APB_P_default = 0 + # 0x00 + + openocd.halt() + openocd.write_word(WU_BASE_ADDRESS + + WU_CLOCKS_BU_OFFSET, WU_CLOCKS_default) + openocd.write_word(PM_BASE_ADDRESS + + PM_Clk_APB_P_Set_OFFSET, APB_P_default) + openocd.write_word(PM_BASE_ADDRESS + + PM_Clk_APB_M_Set_OFFSET, APB_M_default) + openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, AHB_default) diff --git a/mik32_upload.py b/mik32_upload.py index 7afe403..dbbb0b0 100644 --- a/mik32_upload.py +++ b/mik32_upload.py @@ -320,7 +320,7 @@ def upload_file( openocd.run(f"log_output \"{log_path}\"") openocd.run(f"debug_level 1") - mik32_pm.pm_init() + mik32_pm.pm_init(openocd) if (pages.pages_eeprom.__len__() > 0): start_time = time.perf_counter()