fix spi, fix uart stuff

This commit is contained in:
Sergey Shchelkanov 2023-04-05 17:35:07 +03:00
parent 06f6bd03cc
commit 0399d3110c
3 changed files with 6 additions and 2 deletions

View File

@ -73,7 +73,7 @@ def parse_hex(file: str) -> dict:
elif rectype == 4: # Extended Linear Address Record
print("Extended Linear Address Record")
print("ERROR: unimplemented record type 4 on line %i" % (i+1))
is_error = True
# is_error = True
elif rectype == 5: # Start Linear Address Record
print("Start Linear Address is 0x%s (line %i)" %
(data_bytes_line, (i+1)))

View File

@ -5,7 +5,7 @@ from pathlib import Path
def write_file(filename):
with OpenOcdTclRpc() as openocd:
openocd.halt()
openocd.reset_halt()
print(openocd.run("load_image {%s} 0x0" % Path(filename)))
openocd.resume(0)
print("RAM write file maybe done")

View File

@ -90,6 +90,10 @@ class OpenOcdTclRpc:
raise TclException(code, msg)
else:
return msg
def reset_halt(self):
"""Halt MCU and raise an error if it returns an error"""
return self.run("capture \"reset halt\"")
def halt(self):
"""Halt MCU and raise an error if it returns an error"""