mirror of
https://github.com/MikronMIK32/mik32-uploader.git
synced 2026-01-01 13:37:03 +03:00
111 lines
4.0 KiB
Python
111 lines
4.0 KiB
Python
# --------------------------
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# SPIFI register fields
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# --------------------------
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# CTRL
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SPIFI_CONFIG_CTRL_TIMEOUT_S = 0
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SPIFI_CONFIG_CTRL_TIMEOUT_M = (0xFFFF << SPIFI_CONFIG_CTRL_TIMEOUT_S)
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def SPIFI_CONFIG_CTRL_TIMEOUT(v):
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return (((v) << SPIFI_CONFIG_CTRL_TIMEOUT_S) & SPIFI_CONFIG_CTRL_TIMEOUT_M)
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SPIFI_CONFIG_CTRL_CSHIGH_S = 16
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SPIFI_CONFIG_CTRL_CSHIGH_M = (0xF << SPIFI_CONFIG_CTRL_CSHIGH_S)
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def SPIFI_CONFIG_CTRL_CSHIGH(v):
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return (((v) << SPIFI_CONFIG_CTRL_CSHIGH_S) & SPIFI_CONFIG_CTRL_CSHIGH_M)
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SPIFI_CONFIG_CTRL_CACHE_EN_S = 20
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SPIFI_CONFIG_CTRL_CACHE_EN_M = (0x1 << SPIFI_CONFIG_CTRL_CACHE_EN_S)
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SPIFI_CONFIG_CTRL_D_CACHE_DIS_S = 21
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SPIFI_CONFIG_CTRL_D_CACHE_DIS_M = (0x1 << SPIFI_CONFIG_CTRL_D_CACHE_DIS_S)
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SPIFI_CONFIG_CTRL_INTEN_S = 22
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SPIFI_CONFIG_CTRL_INTEN_M = (0x1 << SPIFI_CONFIG_CTRL_INTEN_S)
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SPIFI_CONFIG_CTRL_MODE3_S = 23
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SPIFI_CONFIG_CTRL_MODE3_M = (0x1 << SPIFI_CONFIG_CTRL_MODE3_S)
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SPIFI_CONFIG_CTRL_SCK_DIV_S = 24
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SPIFI_CONFIG_CTRL_SCK_DIV_M = (0x7 << SPIFI_CONFIG_CTRL_SCK_DIV_S)
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def SPIFI_CONFIG_CTRL_SCK_DIV(v):
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return (((v) << SPIFI_CONFIG_CTRL_SCK_DIV_S) & SPIFI_CONFIG_CTRL_SCK_DIV_M)
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SPIFI_CONFIG_CTRL_PREFETCH_DIS_S = 27
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SPIFI_CONFIG_CTRL_PREFETCH_DIS_M = (0x1 << SPIFI_CONFIG_CTRL_PREFETCH_DIS_S)
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SPIFI_CONFIG_CTRL_DUAL_S = 28
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SPIFI_CONFIG_CTRL_DUAL_M = (0x1 << SPIFI_CONFIG_CTRL_DUAL_S)
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SPIFI_CONFIG_CTRL_RFCLK_S = 29
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SPIFI_CONFIG_CTRL_RFCLK_M = (0x1 << SPIFI_CONFIG_CTRL_RFCLK_S)
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SPIFI_CONFIG_CTRL_FBCLK_S = 30
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SPIFI_CONFIG_CTRL_FBCLK_M = (0x1 << SPIFI_CONFIG_CTRL_FBCLK_S)
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SPIFI_CONFIG_CTRL_DMAEN_S = 31
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SPIFI_CONFIG_CTRL_DMAEN_M = (0x1 << SPIFI_CONFIG_CTRL_DMAEN_S)
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# CMD
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SPIFI_CONFIG_CMD_DATALEN_S = 0
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SPIFI_CONFIG_CMD_DATALEN_M = (0x3FFF << SPIFI_CONFIG_CMD_DATALEN_S)
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def SPIFI_CONFIG_CMD_DATALEN(v):
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return (((v) << SPIFI_CONFIG_CMD_DATALEN_S) & SPIFI_CONFIG_CMD_DATALEN_M)
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SPIFI_CONFIG_CMD_POLL_S = 14
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SPIFI_CONFIG_CMD_POLL_M = (0x1 << SPIFI_CONFIG_CMD_POLL_S)
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SPIFI_CONFIG_CMD_DOUT_S = 15
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SPIFI_CONFIG_CMD_DOUT_M = (0x1 << SPIFI_CONFIG_CMD_DOUT_S)
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SPIFI_CONFIG_CMD_INTLEN_S = 16
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SPIFI_CONFIG_CMD_INTLEN_M = (0x7 << SPIFI_CONFIG_CMD_INTLEN_S)
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SPIFI_CONFIG_CMD_FIELDFORM_S = 19
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SPIFI_CONFIG_CMD_FIELDFORM_M = (0x3 << SPIFI_CONFIG_CMD_FIELDFORM_S)
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SPIFI_CONFIG_CMD_FRAMEFORM_S = 21
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SPIFI_CONFIG_CMD_FRAMEFORM_M = (0x7 << SPIFI_CONFIG_CMD_FRAMEFORM_S)
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SPIFI_CONFIG_CMD_OPCODE_S = 24
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SPIFI_CONFIG_CMD_OPCODE_M = (0xFF << SPIFI_CONFIG_CMD_OPCODE_S)
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SPIFI_CONFIG_CMD_DATALEN_BUSY_INDEX_S = 0
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SPIFI_CONFIG_CMD_DATALEN_BUSY_DONE_VALUE_S = 3
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SPIFI_CONFIG_CMD_FRAMEFORM_RESERVED = 0
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SPIFI_CONFIG_CMD_FRAMEFORM_OPCODE_NOADDR = 1
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SPIFI_CONFIG_CMD_FRAMEFORM_OPCODE_1ADDR = 2
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SPIFI_CONFIG_CMD_FRAMEFORM_OPCODE_2ADDR = 3
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SPIFI_CONFIG_CMD_FRAMEFORM_OPCODE_3ADDR = 4
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SPIFI_CONFIG_CMD_FRAMEFORM_OPCODE_4ADDR = 5
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SPIFI_CONFIG_CMD_FRAMEFORM_NOOPCODE_3ADDR = 6
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SPIFI_CONFIG_CMD_FRAMEFORM_NOOPCODE_4ADDR = 7
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SPIFI_CONFIG_CMD_FIELDFORM_ALL_SERIAL = 0
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SPIFI_CONFIG_CMD_FIELDFORM_DATA_PARALLEL = 1
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SPIFI_CONFIG_CMD_FIELDFORM_OPCODE_SERIAL = 2
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SPIFI_CONFIG_CMD_FIELDFORM_ALL_PARALLEL = 3
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# MCMD
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SPIFI_CONFIG_MCMD_POLL_S = 14
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SPIFI_CONFIG_MCMD_POLL_M = (0x1 << SPIFI_CONFIG_MCMD_POLL_S)
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SPIFI_CONFIG_MCMD_DOUT_S = 15
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SPIFI_CONFIG_MCMD_DOUT_M = (0x1 << SPIFI_CONFIG_MCMD_DOUT_S)
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SPIFI_CONFIG_MCMD_INTLEN_S = 16
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SPIFI_CONFIG_MCMD_INTLEN_M = (0x7 << SPIFI_CONFIG_MCMD_INTLEN_S)
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SPIFI_CONFIG_MCMD_FIELDFORM_S = 19
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SPIFI_CONFIG_MCMD_FIELDFORM_M = (0x3 << SPIFI_CONFIG_MCMD_FIELDFORM_S)
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SPIFI_CONFIG_MCMD_FRAMEFORM_S = 21
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SPIFI_CONFIG_MCMD_FRAMEFORM_M = (0x7 << SPIFI_CONFIG_MCMD_FRAMEFORM_S)
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SPIFI_CONFIG_MCMD_OPCODE_S = 24
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SPIFI_CONFIG_MCMD_OPCODE_M = (0xFF << SPIFI_CONFIG_MCMD_OPCODE_S)
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# STATUS
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SPIFI_CONFIG_STAT_MCINIT_S = 0
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SPIFI_CONFIG_STAT_MCINIT_M = (0x1 << SPIFI_CONFIG_STAT_MCINIT_S)
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SPIFI_CONFIG_STAT_CMD_S = 1
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SPIFI_CONFIG_STAT_CMD_M = (0x1 << SPIFI_CONFIG_STAT_CMD_S)
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SPIFI_CONFIG_STAT_RESET_S = 4
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SPIFI_CONFIG_STAT_RESET_M = (0x1 << SPIFI_CONFIG_STAT_RESET_S)
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SPIFI_CONFIG_STAT_INTRQ_S = 5
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SPIFI_CONFIG_STAT_INTRQ_M = (0x1 << SPIFI_CONFIG_STAT_INTRQ_S)
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SPIFI_CONFIG_STAT_VERSION_S = 24
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SPIFI_CONFIG_STAT_VERSION_M = (0xFF << SPIFI_CONFIG_STAT_VERSION_S) |