mirror of
https://github.com/MikronMIK32/mik32-uploader.git
synced 2026-01-01 21:37:05 +03:00
74 lines
2.0 KiB
INI
74 lines
2.0 KiB
INI
set adapterName [adapter name]
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proc shift_dr_tcb {value} {
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set revers_instr 0
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for { set i 0} {$i < 37} {incr i} {
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set bit [expr "($value>>(36-$i)) & 1"]
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set revers_instr [expr "$revers_instr + ($bit<<$i)"]
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}
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irscan riscv.sys 5
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set instruction_31_0 [expr "$revers_instr & 0xFFFFFFFF"]
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set instruction_36_32 [expr "($revers_instr >> 32) & 0xFFFFFFFF"]
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set dr [drscan riscv.sys 32 $instruction_31_0 5 $instruction_36_32]
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return $dr
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}
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proc reset_with_tcb { } {
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puts "System reset using TCB"
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# Сброс ОЗУ, контроллера EEPROM, контроллера SPIFI, сброс домена периферийных устройств,
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# сброс контроллера DMA, сброс процессора cpu_rst_n, сброс процессора rst_n.
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# При этом не будут сброшены блоки:
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# - EPIC;
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# - OTP_CONTROLLER;
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# - PAD_CONTROL;
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# - POWER_MANAGER;
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# - PVD_CONTROL_REG;
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# - TIMER32_0;
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# - WDT_BUS.
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set instruction [expr "(7 << 32) + (1 << 6) + (1 << 7) + (1 << 9) + (1 << 10) + (1 << 11)"]
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shift_dr_tcb $instruction
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shift_dr_tcb $instruction
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}
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if {$adapterName == "ch347"} {
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proc init_reset {mode} {
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global adapterName
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puts "Adapter: $adapterName"
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puts "Using reset without srst"
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adapter assert trst
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#sleep 1
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adapter deassert trst
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runtest 50
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jtag arp_init
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reset_with_tcb
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}
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}
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proc init_targets {} {
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global adapterName
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if {$adapterName == "ch347"} {reset_config trst_only} else {reset_config trst_and_srst}
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set _CHIPNAME riscv
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set _CPUTAPID 0xdeb11001
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set _SYSTAPID 0xfffffffe
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME sys -irlen 4 -ircapture 0x05 -irmask 0x0F -enable -expected-id $_SYSTAPID -ignore-bypass
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0
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riscv expose_csrs 2016=mcounten
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}
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poll_period 200
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init
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riscv.cpu arm semihosting enable
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puts "init done" |