set adapterName [adapter name]

proc shift_dr_tcb {value} {
  set revers_instr 0
  for { set i 0}  {$i < 37} {incr i} {
    set bit   [expr "($value>>(36-$i)) & 1"]
    set revers_instr [expr "$revers_instr + ($bit<<$i)"]
  }

  irscan riscv.sys 5
  set instruction_31_0  [expr "$revers_instr & 0xFFFFFFFF"]
  set instruction_36_32 [expr "($revers_instr >> 32) & 0xFFFFFFFF"] 
  set dr [drscan riscv.sys 32 $instruction_31_0 5 $instruction_36_32]
  return $dr
}

proc reset_with_tcb { } {
  puts "System reset using TCB"
  # Сброс ОЗУ, контроллера EEPROM, контроллера SPIFI, сброс домена периферийных устройств,
  # сброс контроллера DMA, сброс процессора cpu_rst_n, сброс процессора rst_n.
  # При этом не будут сброшены блоки:
  # - EPIC;
  # - OTP_CONTROLLER;
  # - PAD_CONTROL;
  # - POWER_MANAGER;
  # - PVD_CONTROL_REG;
  # - TIMER32_0;
  # - WDT_BUS.
  set instruction [expr "(7 << 32) + (1 << 6) + (1 << 7) + (1 << 9) + (1 << 10) + (1 << 11)"]
  shift_dr_tcb $instruction
  shift_dr_tcb $instruction
}

if {$adapterName == "ch347"} {
  proc init_reset {mode} {
    global adapterName

    puts "Adapter: $adapterName"
    puts "Using reset without srst"
    
    adapter assert trst
    #sleep 1
    adapter deassert trst
    runtest 50
    jtag arp_init
    
    reset_with_tcb
  }
}

proc init_targets {} {
  global adapterName
  if {$adapterName == "ch347"} {reset_config trst_only} else {reset_config trst_and_srst}

  set _CHIPNAME riscv
  set _CPUTAPID 0xdeb11001
  set _SYSTAPID 0xfffffffe

  jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID

  jtag newtap $_CHIPNAME sys -irlen 4 -ircapture 0x05 -irmask 0x0F -enable -expected-id $_SYSTAPID -ignore-bypass
    
  set _TARGETNAME $_CHIPNAME.cpu

  target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0

  riscv expose_csrs 2016=mcounten
}

poll_period 200

init
riscv.cpu arm semihosting enable
puts "init done"