mirror of
https://github.com/MikronMIK32/mik32-uploader.git
synced 2026-01-01 13:37:03 +03:00
move pm control to new file and move to main script
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parent
02aa40ecb2
commit
d4cea3d896
@ -4,46 +4,6 @@ import time
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from tclrpc import OpenOcdTclRpc
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from utils import bytes2words
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# --------------------------
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# PM register offset
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# --------------------------
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PM_BASE_ADDRESS = 0x000050000
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PM_Clk_AHB_Set_OFFSET = 0x0C
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PM_Clk_APB_M_Set_OFFSET = 0x14
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PM_Clk_APB_P_Set_OFFSET = 0x1C
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# --------------------------
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# PM register fields
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# --------------------------
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# AHB BUS
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PM_CLOCK_CPU_S = 0
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PM_CLOCK_CPU_M = (1 << PM_CLOCK_CPU_S)
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PM_CLOCK_EEPROM_S = 1
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PM_CLOCK_EEPROM_M = (1 << PM_CLOCK_EEPROM_S)
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PM_CLOCK_RAM_S = 2
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PM_CLOCK_RAM_M = (1 << PM_CLOCK_RAM_S)
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PM_CLOCK_SPIFI_S = 3
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PM_CLOCK_SPIFI_M = (1 << PM_CLOCK_SPIFI_S)
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PM_CLOCK_TCB_S = 4
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PM_CLOCK_TCB_M = (1 << PM_CLOCK_TCB_S)
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PM_CLOCK_DMA_S = 5
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PM_CLOCK_DMA_M = (1 << PM_CLOCK_DMA_S)
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PM_CLOCK_CRYPTO_S = 6
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PM_CLOCK_CRYPTO_M = (1 << PM_CLOCK_CRYPTO_S)
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PM_CLOCK_CRC32_S = 7
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PM_CLOCK_CRC32_M = (1 << PM_CLOCK_CRC32_S)
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# APB M
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PM_CLOCK_PM_S = 0
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PM_CLOCK_PM_M = (1 << PM_CLOCK_PM_S)
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# --------------------------
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# WU register offset
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# --------------------------
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WU_BASE_ADDRESS = 0x00060000
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WU_Clocks_OFFSET = 0x10
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# --------------------------
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# EEPROM register offset
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@ -94,11 +54,6 @@ EEPROM_PAGE_MASK = 0x1F80
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def eeprom_sysinit(openocd: OpenOcdTclRpc):
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print("MCU clock init...", flush=True)
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openocd.write_word(WU_BASE_ADDRESS + WU_Clocks_OFFSET, 0x202)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_P_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_M_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, 0xffffffff)
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class EEPROM_Operation(Enum):
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READ = EEPROM_OP_RD
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55
mik32_pm.py
Normal file
55
mik32_pm.py
Normal file
@ -0,0 +1,55 @@
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# --------------------------
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# PM register offset
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# --------------------------
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PM_BASE_ADDRESS = 0x000050000
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PM_Clk_AHB_Set_OFFSET = 0x0C
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PM_Clk_APB_M_Set_OFFSET = 0x14
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PM_Clk_APB_P_Set_OFFSET = 0x1C
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# --------------------------
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# PM register fields
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# --------------------------
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# AHB BUS
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PM_CLOCK_CPU_S = 0
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PM_CLOCK_CPU_M = (1 << PM_CLOCK_CPU_S)
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PM_CLOCK_EEPROM_S = 1
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PM_CLOCK_EEPROM_M = (1 << PM_CLOCK_EEPROM_S)
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PM_CLOCK_RAM_S = 2
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PM_CLOCK_RAM_M = (1 << PM_CLOCK_RAM_S)
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PM_CLOCK_SPIFI_S = 3
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PM_CLOCK_SPIFI_M = (1 << PM_CLOCK_SPIFI_S)
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PM_CLOCK_TCB_S = 4
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PM_CLOCK_TCB_M = (1 << PM_CLOCK_TCB_S)
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PM_CLOCK_DMA_S = 5
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PM_CLOCK_DMA_M = (1 << PM_CLOCK_DMA_S)
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PM_CLOCK_CRYPTO_S = 6
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PM_CLOCK_CRYPTO_M = (1 << PM_CLOCK_CRYPTO_S)
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PM_CLOCK_CRC32_S = 7
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PM_CLOCK_CRC32_M = (1 << PM_CLOCK_CRC32_S)
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# APB M
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PM_CLOCK_PM_S = 0
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PM_CLOCK_PM_M = (1 << PM_CLOCK_PM_S)
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# --------------------------
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# WU register offset
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# --------------------------
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WU_BASE_ADDRESS = 0x00060000
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WU_CLOCKS_BU_OFFSET = 0x10
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# --------------------------
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# WU register fields
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# --------------------------
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# CLOCKS_BU
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def pm_init():
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openocd.write_word(WU_BASE_ADDRESS + WU_CLOCKS_BU_OFFSET, 0x202)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_P_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_M_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, 0xffffffff)
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@ -5,46 +5,6 @@ from tclrpc import TclException
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from tclrpc import OpenOcdTclRpc
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from mik32_dma import DMA, ChannelMode, ChannelIndex, ChannelAck, ChannelIncrement, ChannelPriority, ChannelRequest, ChannelSize
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# --------------------------
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# PM register offset
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# --------------------------
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PM_BASE_ADDRESS = 0x000050000
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PM_Clk_AHB_Set_OFFSET = 0x0C
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PM_Clk_APB_M_Set_OFFSET = 0x14
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PM_Clk_APB_P_Set_OFFSET = 0x1C
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# --------------------------
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# PM register fields
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# --------------------------
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# AHB BUS
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PM_CLOCK_CPU_S = 0
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PM_CLOCK_CPU_M = (1 << PM_CLOCK_CPU_S)
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PM_CLOCK_EEPROM_S = 1
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PM_CLOCK_EEPROM_M = (1 << PM_CLOCK_EEPROM_S)
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PM_CLOCK_RAM_S = 2
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PM_CLOCK_RAM_M = (1 << PM_CLOCK_RAM_S)
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PM_CLOCK_SPIFI_S = 3
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PM_CLOCK_SPIFI_M = (1 << PM_CLOCK_SPIFI_S)
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PM_CLOCK_TCB_S = 4
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PM_CLOCK_TCB_M = (1 << PM_CLOCK_TCB_S)
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PM_CLOCK_DMA_S = 5
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PM_CLOCK_DMA_M = (1 << PM_CLOCK_DMA_S)
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PM_CLOCK_CRYPTO_S = 6
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PM_CLOCK_CRYPTO_M = (1 << PM_CLOCK_CRYPTO_S)
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PM_CLOCK_CRC32_S = 7
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PM_CLOCK_CRC32_M = (1 << PM_CLOCK_CRC32_S)
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# APB M
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PM_CLOCK_PM_S = 0
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PM_CLOCK_PM_M = (1 << PM_CLOCK_PM_S)
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# --------------------------
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# WU register offset
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# --------------------------
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WU_BASE_ADDRESS = 0x00060000
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WU_Clocks_OFFSET = 0x10
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# --------------------------
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# SPIFI register offset
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@ -240,11 +200,6 @@ def spifi_init_periphery(openocd: OpenOcdTclRpc):
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def spifi_init(openocd: OpenOcdTclRpc):
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print("MCU clock init", flush=True)
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openocd.write_word(WU_BASE_ADDRESS + WU_Clocks_OFFSET, 0x202)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_P_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_APB_M_Set_OFFSET, 0xffffffff)
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openocd.write_word(PM_BASE_ADDRESS + PM_Clk_AHB_Set_OFFSET, 0xffffffff)
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spifi_init_periphery(openocd)
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control = openocd.read_word(SPIFI_CONFIG_CTRL)
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@ -9,6 +9,7 @@ from tclrpc import OpenOcdTclRpc, TclException
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import mik32_eeprom
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import mik32_spifi
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import mik32_ram
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import mik32_pm
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from mik32_parsers import *
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@ -319,6 +320,8 @@ def upload_file(
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openocd.run(f"log_output \"{log_path}\"")
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openocd.run(f"debug_level 1")
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mik32_pm.pm_init()
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if (pages.pages_eeprom.__len__() > 0):
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start_time = time.perf_counter()
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