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Проверка ошибок при загрузке драйвером

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sh-sergey 2024-12-26 13:05:18 +03:00
parent d3ae56eff5
commit c5950bfa4f
2 changed files with 49 additions and 17 deletions
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48
mik32_debug_hal/eeprom.py
View File

@ -5,7 +5,7 @@ import pathlib
import sys import sys
from typing import Dict, List, Tuple from typing import Dict, List, Tuple
import time import time
from tclrpc import OpenOcdTclRpc from tclrpc import OpenOcdTclRpc, TclException
from utils import bytes2words from utils import bytes2words
import mik32_debug_hal.registers.memory_map as mem_map import mik32_debug_hal.registers.memory_map as mem_map
@ -297,36 +297,62 @@ def write_memory(pages: Dict[int, List[int]], openocd: OpenOcdTclRpc, driver_pat
# TODO: добавить проверку на версию mik32 - текущий драйвер поддерживает # TODO: добавить проверку на версию mik32 - текущий драйвер поддерживает
# только версию mik32v2 # только версию mik32v2
RAM_OFFSET = 0x02000000
RAM_BUFFER_OFFSET = 0x02001800
RAM_DRIVER_STATUS = 0x02003800
bytes_list = combine_pages(pages) bytes_list = combine_pages(pages)
openocd.halt() openocd.halt()
openocd.run("riscv.cpu set_reg {mstatus 0 mie 0}") # Отключение прерываний openocd.run("riscv.cpu set_reg {mstatus 0 mie 0}") # Отключение прерываний
STATUS_CODE_M = 0xFF STATUS_CODE_M = 0xFF
max_address = len(bytes_list) // 128 max_address = len(bytes_list) // 128
openocd.write_memory(0x02003800, 32, [1 | (max_address << 8)]) openocd.write_memory(RAM_DRIVER_STATUS, 32, [1 | (max_address << 8)])
pathname = os.path.dirname(sys.argv[0]) pathname = os.path.dirname(sys.argv[0])
openocd.run("wp 0x2003800 4 w") # готовимся поймать результат записи
print("Uploading driver... ", end="", flush=True) print("Uploading driver... ", end="", flush=True)
openocd.run(f"load_image {{{pathlib.Path(driver_path)}}}") openocd.run(f"load_image {{{pathlib.Path(driver_path)}}}")
print("OK!", flush=True) print("OK!", flush=True)
print("Uploading data... ", end="", flush=True) print("Uploading data... ", end="", flush=True)
openocd.write_memory(0x02001800, 8, bytes_list) result = openocd.write_memory(RAM_BUFFER_OFFSET, 8, bytes_list)
print("OK!", flush=True) if result:
print("ERROR!", flush=True)
print("An error occurred while writing data to the buffer area!")
print("Aborting...", flush=True)
return 1
else:
print("OK!", flush=True)
# mem = openocd.read_memory(0x01000000, 8, len(bytes_list))
# print(f"total bytes read {len(bytes_list)}")
# for i in range(len(bytes_list)):
# if bytes_list[i] != mem[i]:
# print(f"RAM data mismatch at address 0x{i:08x};"
# f"expect 0x{bytes_list[i]:08x} get 0x{mem[i]:08x}!", flush=True)
# return 1
openocd.run(f"wp 0x{RAM_DRIVER_STATUS:08x} 4 w") # готовимся поймать результат записи
print("Run driver...", flush=True) print("Run driver...", flush=True)
openocd.resume(0x2000000) openocd.resume(RAM_OFFSET)
wait_halted(openocd, 10) # ждем, когда watchpoint сработает try:
openocd.run("rwp 0x02003800") # watchpoint ловит до изменения слова # ждем, когда watchpoint сработает
wait_halted(openocd, 10)
except TclException:
print("Timeout!", flush=True)
# return 1
openocd.run(f"rwp 0x{RAM_DRIVER_STATUS:08x}") # watchpoint ловит до изменения слова
openocd.run("step") # делаем шаг, чтобы прочитать новое слово openocd.run("step") # делаем шаг, чтобы прочитать новое слово
result = openocd.read_memory(0x2003800, 32, 1)[0] result = openocd.read_memory(RAM_DRIVER_STATUS, 32, 1)[0]
if (result & 0xFF) == 0: if (result & STATUS_CODE_M) == 0:
print(f"EEPROM writing successfully completed!", flush=True) print(f"EEPROM writing successfully completed!", flush=True)
else: else:
miss_page = (result >> 8) & (64 - 1) miss_page = (result >> 8) & (64 - 1)

18
mik32_debug_hal/registers/memory_map.py
View File

@ -49,8 +49,11 @@ SPIFI_CONFIG_STAT = SPIFI_REGS + 0x01C
PM_REGS = 0x000050000 PM_REGS = 0x000050000
PM_Clk_AHB_Set_OFFSET = PM_REGS + 0x0C PM_Clk_AHB_Set_OFFSET = PM_REGS + 0x0C
PM_Clk_AHB_Clear_OFFSET = PM_REGS + 0x10
PM_Clk_APB_M_Set_OFFSET = PM_REGS + 0x14 PM_Clk_APB_M_Set_OFFSET = PM_REGS + 0x14
PM_Clk_APB_M_Clear_OFFSET = PM_REGS + 0x18
PM_Clk_APB_P_Set_OFFSET = PM_REGS + 0x1C PM_Clk_APB_P_Set_OFFSET = PM_REGS + 0x1C
PM_Clk_APB_P_Clear_OFFSET = PM_REGS + 0x20
# -------------------------- # --------------------------
@ -66,28 +69,31 @@ WU_CLOCKS_BU_OFFSET = WU_REGS + 0x10
# -------------------------- # --------------------------
PAD_CONFIG_REGS = 0x00050C00 PAD_CONFIG_REGS = 0x00050C00
class PAD_CONFIG_REGS_V0(Enum): class PAD_CONFIG_REGS_V0(Enum):
PORT_0_CFG = 0x00 PORT_0_CFG = 0x00
PORT_1_CFG = 0x04 PORT_1_CFG = 0x04
PORT_2_CFG = 0x08 PORT_2_CFG = 0x08
PORT_0_DS = 0x0C PORT_0_DS = 0x0C
PORT_1_DS = 0x10 PORT_1_DS = 0x10
PORT_2_DS = 0x14 PORT_2_DS = 0x14
PORT_0_PUD = 0x18 PORT_0_PUD = 0x18
PORT_1_PUD = 0x1C PORT_1_PUD = 0x1C
PORT_2_PUD = 0x20 PORT_2_PUD = 0x20
class PAD_CONFIG_REGS_V2(Enum): class PAD_CONFIG_REGS_V2(Enum):
PORT_0_CFG = 0x00 PORT_0_CFG = 0x00
PORT_0_DS = 0x04 PORT_0_DS = 0x04
PORT_0_PUD = 0x08 PORT_0_PUD = 0x08
PORT_1_CFG = 0x0C PORT_1_CFG = 0x0C
PORT_1_DS = 0x10 PORT_1_DS = 0x10
PORT_1_PUD = 0x14 PORT_1_PUD = 0x14
PORT_2_CFG = 0x18 PORT_2_CFG = 0x18
PORT_2_DS = 0x1C PORT_2_DS = 0x1C
PORT_2_PUD = 0x20 PORT_2_PUD = 0x20
# -------------------------- # --------------------------
# EEPROM register offset # EEPROM register offset
# -------------------------- # --------------------------