Elron_dev/mik32-uploader
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This commit is contained in:
Sergey Shchelkanov 2024-02-02 18:00:38 +03:00
parent d834e39b28
commit baf9f26a6d
2 changed files with 9 additions and 3 deletions
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7
mik32_spifi.py
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@ -402,7 +402,7 @@ def spifi_page_program(
progress: str = "", progress: str = "",
dma: Union[DMA, None] = None dma: Union[DMA, None] = None
): ):
print(f"Writing page {ByteAddress:#010x}... {progress}", flush=True) print(f"Writing Flash page {ByteAddress:#010x}... {progress}", flush=True)
if byte_count > 256: if byte_count > 256:
raise Exception("Byte count more than 256") raise Exception("Byte count more than 256")
@ -587,7 +587,7 @@ def check_pages(pages: Dict[int, List[int]], openocd: OpenOcdTclRpc, use_quad_sp
return result return result
if result == 0: if result == 0:
print("SPIFI page checking completed", flush=True) print("SPIFI pages checking completed", flush=True)
return 0 return 0
# # PROFILING IMPORTS # # PROFILING IMPORTS
@ -700,5 +700,6 @@ def write_pages(pages: Dict[int, List[int]], openocd: OpenOcdTclRpc, use_quad_sp
# # PROFILING GET STATS END # # PROFILING GET STATS END
if result == 0: if result == 0:
print("SPIFI page recording completed", flush=True) # Прошивка страниц флеш памяти по SPIFI была завершена
print("Flashing of flash memory pages via SPIFI has been completed", flush=True)
return 0 return 0

5
openocd-scripts/target/mik32.cfg
View File

@ -1,4 +1,6 @@
proc my_init_proc { } { echo "Disabling watchdog..." }
proc init_targets {} { proc init_targets {} {
@ -14,10 +16,13 @@ proc init_targets {} {
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0 target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0
riscv.cpu configure -event reset-init my_init_proc
} }
poll_period 200 poll_period 200
init init
riscv.cpu arm semihosting enable
puts "init done" puts "init done"