Elron_dev/mik32-uploader
7
0 Fork 0
mirror of https://github.com/MikronMIK32/mik32-uploader.git synced 2026-10-29 18:11:13 +03:00
Code Issues Actions Packages Projects Releases 2 Wiki Activity

update messages

Browse Source
This commit is contained in:
Sergey Shchelkanov committed 2024-02-02 18:00:38 +03:00
1 parent d834e39b28
commit baf9f26a6d
2 files changed
+9 -3
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

openocd-scripts/target/mik32.cfg
+5
View File
@@ -1,4 +1,6 @@
proc my_init_proc { } { echo "Disabling watchdog..." }
proc init_targets {} {
@@ -14,10 +16,13 @@ proc init_targets {} {
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -endian little -chain-position $_TARGETNAME -coreid 0
riscv.cpu configure -event reset-init my_init_proc
}
poll_period 200
init
riscv.cpu arm semihosting enable
puts "init done"