Elron_dev/mik32-uploader
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optional resume at the end of uploading

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Sergey Shchelkanov 2023-04-25 16:25:35 +03:00
parent eebca60bda
commit 0978eed36d
4 changed files with 13 additions and 10 deletions
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3
mik32_eeprom.py
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@ -193,7 +193,7 @@ def eeprom_check_data_ahb_lite(openocd: OpenOcdTclRpc, words: list[int]) -> int:
return 0 return 0
def write_words(words: list[int], write_by_word = False, read_through_apb = False) -> int: def write_words(words: list[int], write_by_word = False, read_through_apb = False, is_resume=True) -> int:
""" """
Write words in MIK32 EEPROM through APB bus Write words in MIK32 EEPROM through APB bus
@ -249,6 +249,7 @@ def write_words(words: list[int], write_by_word = False, read_through_apb = Fals
result = eeprom_check_data_apb(openocd, words) result = eeprom_check_data_apb(openocd, words)
else: else:
result = eeprom_check_data_ahb_lite(openocd, words) result = eeprom_check_data_ahb_lite(openocd, words)
if is_resume:
openocd.resume(0) openocd.resume(0)
if result == 0: if result == 0:
print("EEPROM write file done!") print("EEPROM write file done!")

3
mik32_ram.py
View File

@ -2,10 +2,11 @@ from .tclrpc import TclException
from .tclrpc import OpenOcdTclRpc from .tclrpc import OpenOcdTclRpc
from pathlib import Path from pathlib import Path
def write_file(filename): def write_file(filename, is_resume=True):
with OpenOcdTclRpc() as openocd: with OpenOcdTclRpc() as openocd:
openocd.reset_halt() openocd.reset_halt()
print(openocd.run("load_image {%s} 0x0" % Path(filename))) print(openocd.run("load_image {%s} 0x0" % Path(filename)))
if is_resume:
openocd.resume(0) openocd.resume(0)
print("RAM write file maybe done") print("RAM write file maybe done")

3
mik32_spifi.py
View File

@ -420,7 +420,7 @@ def spifi_write(openocd: OpenOcdTclRpc, address: int, data: list[int], data_len:
print("written") print("written")
def spifi_write_file(bytes: list[int]): def spifi_write_file(bytes: list[int], is_resume=True):
""" """
Write bytes in MIK32 External SPIFI Flash memory Write bytes in MIK32 External SPIFI Flash memory
@ -451,4 +451,5 @@ def spifi_write_file(bytes: list[int]):
spifi_write(openocd, address, bytes, len(bytes) - address) spifi_write(openocd, address, bytes, len(bytes) - address)
spifi_read_data(openocd, address, len(bytes) - address, bytes) spifi_read_data(openocd, address, len(bytes) - address, bytes)
print("end") print("end")
if is_resume:
openocd.resume(0) openocd.resume(0)

8
mik32_upload.py
View File

@ -32,7 +32,7 @@ def test_connection():
raise Exception("ERROR: no regs found, check MCU connection") raise Exception("ERROR: no regs found, check MCU connection")
def upload_file(filename: str, boot_source: str = "eeprom") -> int: def upload_file(filename: str, boot_source: str = "eeprom", is_resume=True) -> int:
""" """
Write ihex or binary file into MIK32 EEPROM or external flash memory Write ihex or binary file into MIK32 EEPROM or external flash memory
@ -69,12 +69,12 @@ def upload_file(filename: str, boot_source: str = "eeprom") -> int:
# proc.kill() # proc.kill()
if boot_source == "eeprom": if boot_source == "eeprom":
result = write_words(bytes2words(get_content(filename))) result = write_words(bytes2words(get_content(filename)), is_resume)
elif boot_source == "spifi": elif boot_source == "spifi":
spifi_write_file(get_content(filename)) spifi_write_file(get_content(filename), is_resume)
result = 0 # TODO result = 0 # TODO
elif boot_source == "ram": elif boot_source == "ram":
write_file(filename) write_file(filename, is_resume)
result = 0 # TODO result = 0 # TODO
else: else:
raise Exception("Unsupported boot source, use eeprom or spifi") raise Exception("Unsupported boot source, use eeprom or spifi")