From cad25827332c022744a07964c1237cca858fbf03 Mon Sep 17 00:00:00 2001
From: KLASSENTS <klassen@elron.tech>
Date: Fri, 30 May 2025 15:54:48 +0700
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---
 cores/arduino/board.cpp                           | 5 ++---
 cores/arduino/mik32/shared/ldscripts/spifi_cpp.ld | 3 +--
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/cores/arduino/board.cpp b/cores/arduino/board.cpp
index ed7cb89..37d08f0 100644
--- a/cores/arduino/board.cpp
+++ b/cores/arduino/board.cpp
@@ -21,13 +21,12 @@
 #define FLASH_END_OFFSET    0x1000
 
 // values from ld script
-extern uint8_t __TEXT_START__[];
-extern uint8_t __TEXT_END__[];
+extern uint8_t __RODATA__[];
 
 // RAM-function for updating flash cache limit by app size to improve performance
 __attribute__((section(".ram_text"))) void updateCacheLimit(void)
 {
-    uint32_t new_limit = (uintptr_t)__TEXT_END__ - (uintptr_t)__TEXT_START__ + 128; // 128 byte for margin
+    uint32_t new_limit = (uintptr_t)__RODATA__ - SPIFI_BASE_ADDRESS;
     // limit cache size by flash size with margin
     if (new_limit > (FLASH_SIZE - FLASH_END_OFFSET))
         new_limit = FLASH_SIZE - FLASH_END_OFFSET;
diff --git a/cores/arduino/mik32/shared/ldscripts/spifi_cpp.ld b/cores/arduino/mik32/shared/ldscripts/spifi_cpp.ld
index 0e80a68..d88e2ad 100644
--- a/cores/arduino/mik32/shared/ldscripts/spifi_cpp.ld
+++ b/cores/arduino/mik32/shared/ldscripts/spifi_cpp.ld
@@ -21,11 +21,10 @@ SECTIONS {
         *crt0.S.o(.text .text.*)
         *(.text.smallsysteminit)
         *(.text.SmallSystemInit)
-        /*. = ORIGIN(rom) + 0xC0;*/
-        /*KEEP(*crt0.S.o(.trap_text))*/
 
         *(.text)
         *(.text.*)
+        PROVIDE(__RODATA__ = .);
         *(.rodata)
         *(.rodata.*)      
         . = ALIGN(CL_SIZE);